This is an example of the SAKURA / SASEBO G family of targets. This is untested, and it should only be used as an example of how to write a Sequence to communicate with a new target of this type.


How to use:

1) Extract the archive to the Inspector user modules directory (e.g. C:\Users\ExampleUser\Inspector\modules\)

2) Run Inspector

3) Open and compile the SakuraXSequence.java

4) Run a SequenceAcquisition/Perturbation module (e.g. Acquisition - Sequence)

5) The new Sequence should now be available from the dropdown in the "target" tab


Changelog

    2019-01-25: Removed dependency on perturbation. SCA-only users should now be able to compile the modules normally.

    2019-08-26: Fixed a bug where the key field wouldn't load, which crashes the module when run

    2020-03-05: Added support for printing IO

    2020-03-06: Added exception handling for communication issues.


Description (from Inspector manual):

There are 5 different flavours of SASEBO boards, all of them designed by RCIS (AIST) [http://www.rcis.aist.go.jp] in Japan. Four of these boards are based on FPGAs (SASEBO, SASEBOG, SASEBO-B and SASEBO-GII), while another one is based on a custom cryptographic LSI (SASEBO-R).


The FPGA versions are configured with an AES implementation, while the SASEBO-R includes all the supported algorithms in the LSI. Additionally, Verilog sources for AES and DES are provided by RCIS for the SASEBO, SASEBO-G and SASEBO-GII; users might choose to integrate other implementations in them as well.


Beware that the provided module is a general module and does not check the availability of the requested algorithms. The only check performed by the module is whether there is communication with the serial port, and if the reported version is the exported version of the Sasebo-R board. Since this particular version has some bits of the key fixed to certain values, the module checks those bits and issues a warning informing the user of the actual key that will be used by the board.


Therefore, depending on your board and the uploaded configuration in the case of FPGA based boards, the available implementations might vary. In case a not implemented algorithm is supported, you will most likely see a response consisting of all zeros for every encryption/decryption request.


For more information on the SASEBO boards, see http://www.rcis.aist.go.jp/special/SASEBO/index-en.html.